Due to the significance of leakage power for CMOS circuits at Nanoscale, a new technique for Sub-threshold leakage current reduction based on Input vector control (IVC) is proposed. The proposed algorithm is called Fast Input Vector Algorithm (FIVA). It is characterized as faster than other algorithms, its speed doubles strongly of other algorithms speed when the number of circuit inputs increases. Simulation results show that the efficiency of the proposed algorithm increases by increasing the number of input vector. For 2-bits Full Adder, FIVA has speed up reaches 70%. For 8-bits Full Adder, FIVA has speed up reaches 97%, which validates the proposed algorithm.